1. Field of the Invention
The present invention relates to a video graphics array (or "VGA") controller for a multimedia system and, more particularly, to a VGA controller having an overlay mode for displaying images formed from selective components of multiple image planes.
2. Description of Related Art
Various techniques for displaying at least two different displays of information on a video display have been disclosed in the art. Such techniques have been most commonly disclosed in connection with the development of techniques for overlaying information on a video display. For example, U.S. Pat. No. 4,200,869 to Murayama et al. discloses a system where an alphanumeric character may be superimposed over a graphical character in a manner such that the alphanumeric character may be read but the graphical character, and thus the continuity of the graphical display, is not destroyed. In Murayama et al., the output from first and second display generators are provided to an OR gate, the output of which drives a CRT. Selective prioritizing of the generated display signals is not possible in the Murayama et al. system.
Another video display system having a signal overlay capability is disclosed in U.S. Pat. No. 4,599,610 to Lacy. In Lacy, an overlay video signal, most commonly, an alphanumeric display, is given priority over a normal video signal, most commonly, a graphical display. The normal video signal is supplied to the base of a first emitter follower transistor while the overlay video signal is supplied to the base of a second emitter follower transistor. The two transistors are biased such that the first (normal) transistor is at a slightly lower voltage than the second (overlay) transistor and is reversed biased (off) any time data is available from the overlay video signal, thereby prioritizing the display of the overlay video signal, when available, over the normal video signal.